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Random vibration analysis of SMD capacitors in and optimizing the placement of capacitors on Printed circuit board
Last modified: 2017-05-20
Abstract
Use of Electronic control units is being extended to commercial vehicles to meet the higher emission standards, safe driving and to provide other comfortable driving functions which are equivalent to passenger car. The requirements of commercial vehicles are severe mainly from vibration point of view. The severity exists in both the vibration load and the operating duration which is roughly 3 times that in the passenger car. Vibration load (sine on random loading) experienced by electronic control units in the commercial vehicles is known to be very challenging mainly for electronics components like surface-mount-device (SMD) and through-hole-technology (THT) electrolytic capacitors.
The position of electronic components like electrolytic capacitors on PCB is decided by layout engineer and the idea behind placing the component is driven more from electrical point of view and there is not much of study carried out from vibration point of view to know the reliability of components for the application. The study has to be carried out to check the fatigue damage on the capacitors caused by the commercial vehicle vibration requirements for the position of the capacitors on PCB in the electronic control unit. We present a case where the position of SMD capacitors placement on PCB may not meet the requirements of commercial vehicle vibration requirements. For this, a finite element model (FE) is used in Ansys, and measurements are carried out on prototype samples.
Initially the FE model of electronic control unit is validated with experimental data for PCB and connector resonance frequencies and damping with Ansys workbench. 1Sigma stress developed at the capacitor pins is calculated with help of random vibration analysis system in the Ansys workbench. Modes contributing the stress are determined and it is found that PCB higher modes are contributing the most of the stress on the pins of the SMD capacitors. Since the PCB mode is contributing to most of the stress on capacitor pins the SMD capacitors have to be placed at position where the PCB mode is having minimum influence on capacitor.
So possible safe areas on PCB for capacitors are found out from mode shapes of PCB. Frequency responses are taken on PCB at safe areas, to know the response of the PCB at critical modes which are affecting the capacitors. Capacitors are moved to position on the PCB such that frequency response from the PCB is very minimal and such the PCB mode is not contributing to the stress developed at the pins of the capacitors.
Stress contributions at the capacitor pins for the proposed position has less contribution from the PCB mode and stress contribution is mainly from component´s self-resonance. The damage is calculated with miners rule for the capacitor failure mode for initial position and proposed position. It is found that cumulative damage for failure location for the proposed position is less than 1.
The position of electronic components like electrolytic capacitors on PCB is decided by layout engineer and the idea behind placing the component is driven more from electrical point of view and there is not much of study carried out from vibration point of view to know the reliability of components for the application. The study has to be carried out to check the fatigue damage on the capacitors caused by the commercial vehicle vibration requirements for the position of the capacitors on PCB in the electronic control unit. We present a case where the position of SMD capacitors placement on PCB may not meet the requirements of commercial vehicle vibration requirements. For this, a finite element model (FE) is used in Ansys, and measurements are carried out on prototype samples.
Initially the FE model of electronic control unit is validated with experimental data for PCB and connector resonance frequencies and damping with Ansys workbench. 1Sigma stress developed at the capacitor pins is calculated with help of random vibration analysis system in the Ansys workbench. Modes contributing the stress are determined and it is found that PCB higher modes are contributing the most of the stress on the pins of the SMD capacitors. Since the PCB mode is contributing to most of the stress on capacitor pins the SMD capacitors have to be placed at position where the PCB mode is having minimum influence on capacitor.
So possible safe areas on PCB for capacitors are found out from mode shapes of PCB. Frequency responses are taken on PCB at safe areas, to know the response of the PCB at critical modes which are affecting the capacitors. Capacitors are moved to position on the PCB such that frequency response from the PCB is very minimal and such the PCB mode is not contributing to the stress developed at the pins of the capacitors.
Stress contributions at the capacitor pins for the proposed position has less contribution from the PCB mode and stress contribution is mainly from component´s self-resonance. The damage is calculated with miners rule for the capacitor failure mode for initial position and proposed position. It is found that cumulative damage for failure location for the proposed position is less than 1.